ASROCK H81M-HG4 User Manual download pdf (Page 53)

H81M-HG4/H81M-DG4/H81M-VG4

English

Refresh Cycle Time (tRFC)

e number of clocks from a Refresh command until the rst Activate command to

the same rank.

RAS to RAS Delay (tRRD)

e number of clocks between two rows activated in dierent banks of the same

rank.

Write to Read Delay (tWTR)

e number of clocks between the last valid write operation and the next read

command to the same internal bank.

Read to Precharge (tRTP)

e number of clocks that are inserted between a read command to a row pre-

charge command to the same rank.

Four Activate Window (tFAW)

e time window in which four activates are allowed the same rank.

CAS Write Latency (tCWL)

Congure CAS Write Latency.

tREFI

Congure refresh cycles at an average periodic interval.

tCKE

Congure the period of time the DDR3 initiates a minimum of one refresh

command internally once it enters Self-Refresh mode.

tRDRD

Congure between module read to read delay.

tRDRDDR

Congure between module read to read delay from dierent ranks.

tRDRDDD

Use this to change DRAM tRWSR Auto/Manual settings. e default is [Auto].

tWRRD

Congure between module write to read delay.

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ASROCK H81M-HG4 User Manual Page 53