ASROCK H97 Anniversary Installation Guide download pdf (Page 70)

H97 Anniversary

English

DRAM Conguration

DRAM Tweaker

Fine tune the DRAM settings by leaving marks in checkboxes. Click OK to conrm and

apply your new settings.

CAS# Latency (tCL)

e time between sending a column address to the memory and the beginning of the data

in response.

RAS# to CAS# Delay (tRCD)

e number of clock cycles required between the opening of a row of memory and

accessing columns within it.

Row Precharge Time (tRP)

e number of clock cycles required between the issuing of the precharge command

and opening the next row.

RAS# Active Time (tRAS)

e number of clock cycles required between a bank active command and issuing the

precharge command.

Command Rate (CR)

e delay between when a memory chip is selected and when the rst active command can

be issued.

1 2 ... 65 66 67 68 69 70 71 72 73 74 75 ... 96 97

No comments

ASROCK H97 Anniversary Installation Guide Page 70